*.kicad_mod text=auto
The KiCad Library Convention (KLC) is a set of requirements for contributing to the official KiCad libraries. Users wishing to submit or update library files should be familiar with these guidelines.
The KLC are a set of guidelines, rather than rules. Electronic component libraries are diverse and complex, and exceptions can be made at the discretion of the library team.
Where the KLC deviates from a particular datasheet or manufacturer recommendation, the datasheet should take preference unless there is a good reason not to do so (which should be clarified by a librarian).
Where the KLC is unclear, users should attempt to match the convention of existing library components, or seek further clarification.
Refer to the contribution guidelines for introductory information on contributing to the KiCad libraries.
The general library guidelines apply to all library elements (symbols / footprints / models). However, these guidelines may be overridden in some cases by specific exceptions described in further sections.
Filenames, symbol names, footprint names and model names must contain only valid characters, as determined below:
Alphanumeric characters (A-Z
, a-z
, 0-9
)
Underscore _
Hyphen / dash -
Period / dot .
Comma ,
Plus symbol +
This character set ensures that symbols will be compatible with all filesytems, and will not cause any issues due to character rendering.
Further, filenames and symbol names must not use the space character. This can cause issues with string escaping and is best avoided.
Libraries with more than 250 items can result in long library loading times. Additionally, such broad categorization of components means that it can be hard to locate a particular component in the libraries.
A library size limit of 250
items ensures that libraries are quick to load and components are easy to locate. If a given library exceeds 250
components, it should be split and further subcategorized according to component functionality.
Rather than grouping components (e.g. symbols, footprints) by their manufacturer, KiCad libraries are organized by component functionality. This grouping strategy has a number of key benefits:
Similar components are grouped together, allowing alternative parts to be easily substituted
Symbol aliases for pin-identical symbols can be used to reduce library size
Generic parts which are produced by multiple manufacturers are supported
Library organization should follow the general form as described below, with each element separated by the underscore (_
) character:
Library function
Library sub-function
Tertiary qualifier
Manufacturer name
Component series name
Extra library descriptors
Note: Some of the elements listed above may be omitted if not required.
For specific examples, refer to the guidelines for organizing symbol libraries and footprint libraries.
KiCad software is used by people who speak many different languages. The KiCad software provides translations for these languages, but the library files do not provide translations.
Library files should be written using English, excepting where specific component names are non-English (for non-English manufacturers).
Where potential differences in spelling and grammar exist, American English should be given preference.
Color
instead of Colour
In general, plural naming (e.g. for libraries) should be avoided, as pluralisation of some words is inconsistent. Non pluralized names should be used in preference:
Sensor_Temperature
instead of Sensors_Temperature
Memory_Flash
instead of Memories_Flash
TerminalBlock
instead of TerminalBlocks
Acronyms should be capitalized
MCU
(microcontroller)
FPGA
(field programmable gate array)
Manufacturer names should be capitalized according to the manufacturer
Microchip
ROHM
Texas
NEC
Unless separated by delimiters such as _
, -
, .
, words should be separated using CamelCase convention, with the first letter of each word capitalised
TestPoint
BatteryHolder
Library files must always be commited to GitHub using Unix-style line endings. This means that lines are terminated using the LF (line feed) character, rather than the DOS style CR+LF line endings.
KiCad library files must be compatible across multiple operating systems, and users should be able to contribute without generating unnecessary noise in the files by constantly changing line endings.
When using the KiCad libraries on a Windows PC, the line endings in the library files may be automatically converted to CR+LF. This is fine, as long as any contributions made to the libraries observe the LF line ending requirements.
This issue is addressed by insisting that all KiCad libraries include a .gitattributes file. This file ensures that the line endings are automatically converted by Git.
An example of a simple .gitattributes file which ensures footprint files have correct line endings is as follows:
*.kicad_mod text=auto
Note: The KiCad library repositories should already have the correct .gitattributes file in place to achieve this
KiCad library components (symbols, footprints) may only contain features that are supported by the latest stable KiCad software release.
Features introduced in nightly builds are not allowed in official KiCad library files.
When specifying a dimension (e.g. in a footprint name) the units must always be provided:
3mm
- millimeters
1in
- inches
When specifying multidimensional units (e.g. length
x width
x height
) then the units only need to be appended once
3x4x7mm
- 3mm x 4mm x 7mm
Metric units are preferred, where appropriate
Linear dimensions should be specified in millimeters
Angular dimensions should be specified in degrees
Temperature should be specified in degrees Celsius
In general terms, the symbols in the KiCad library can be categorized into two groups:
Generic symbols
Generic symbols can be used with multiple footprints, and do not have a default footprint assigned. Generic symbols allow flexibility in the design workflow. Symbols are first added to the schematic, and the footprint is selected before PCB layout. Using generic symbols allows a small number of library symbol elements to represent a very large number of possible component combinations.
An example of the use of generic symbols is the Resistor and Capacitor symbols available in the KiCad library. These symbols do not have an assigned default footprint, as there are many possible compatible footprints.
Atomic Parts
Atomic parts fully define a component, specifying a matching footprint, and are named based on the MPN
(manufacturer part number). Atomic parts are ready to be placed onto the PCB as they are already associated with a footprint.
The following guidelines apply to schematic symbols and symbol library files.
Symbol libraries are individual .lib
files, which have a corresponding .dcm
file. Both files are required to fully describe the symbols contained in the library. Apart from the file extension, both files must have the same name (case sensitive).
Symbol library names must be defined based on the priority list below, with each element separated by the underscore (_
) character:
Function (e.g. Sensor
, Amplifier
, MCU
)
Sub-function (e.g. Temperature
, CurrentSense
)
Tertiary qualifier (e.g. CMOS
)
Manufacturer name (e.g. Atmel
, Infineon
)
Symbol series name (e.g. PIC24
, STM32
)
Extra library descriptors (e.g. Deprecated
)
Note: Some of the elements listed above may be omitted if not required.
Example symbol library names:
Power_Monitor
- Power monitoring components
Sensor_Temperature
- Temperature sensors
Driver_Motor
- Motor drivers
MCU_Microchip_PIC32
- PIC32 microcontrollers from Microchip
Library naming should not be duplicated in footprint name
If symbol with same name exists for multiple manufacturers, the manufacturer name is written first
Specific manufacturer name (for atomic parts)
Type of symbol (for generic parts)
May be shortened for common components (e.g. Conn
for Connector
)
Reference designator may be substituted for common components (e.g. D
, C
, LED
)
Part name should include extension for specific footprint if required (e.g. SOIC
)
Any modification of the original symbol, indicated by appending the reason (e.g. different pin ordering - Q_NPN_CBE
, Q_NPN_BCE
)
Indicate quantity of elements for symbol arrays (e.g. resistor array with 8 elements - Resistor_x8
)
Manufacturer Part Numbers (MPN) often include variations that are non-functional.
Examples:
Temperature rating of the component
Packaging information (e.g. reel, tray, tape)
RoHS / PbFree information
To capture every possible combination of part variation requires a large number of symbol aliases - this is to be avoided.
Where an MPN has options for such non-functional variations, these portions of the MPN should be replaced with a wildcard character (x
).
Rule of thumb
A single symbol should be drawn for each footprint variation of an atomic part. Other variations (as listed above) do not require their own symbol alias.
Many electronic components are provided in multiple footprint (package) options. These may or may not be pin compatible.
e.g. LTC4357
Here there is a requirement for two separate symbols, one corresponding to each available footprint.
The naming of the symbols must match the manufacturer naming convention for the footprint variants. In the image above (taken from the datasheet) the footprints are defined as follows:
DCB
- 6-lead DFN
MS8
- 8-lead MSOP
Thus, two symbols must be drawn:
Where possible, the symbols should be drawn such that they can be swapped in the schematic with minimal disruption to wire connections.
As a further example we shall consider the comparator MCP6566 which is available in three SOT-23-5 versions, each with a different pinout.
In this case, a separate symbol must again be drawn for each version, and named according to the convention called out in the datasheet.
For symmetrical symbols, the symbol must be centered around the origin (0
, 0
) in the symbol editor.
Exception:
For non-symmetrical symbols, or symbols where this requirement would move pins off the 100mil
grid, then the symbol should be placed as close to the origin as possible while observing the pin grid alignment requirements.
All text fields (pin name, pin number, value, reference, footprint, datasheet) should use a text size of 50mil.
Pin names and pin numbers can use a text size as small as 20mil if the symbol is small or has special geometry.
Symbol body must have a line width of 10mil
(0.254mm
)
Black-box symbols (e.g. ICs with hidden functionality) should be filled with background color
Simple components (e.g. discrete components or those with a distinctive shape) should not be filled with background color
Fill background
Do not fill
For black box symbols with complex functionality (e.g. special function ICs), a simplified diagram of the symbol functionality may be drawn on the symbol. This may be used to provide functional clarity in a schematic.
Functional drawing must remain simple
Do not add functional drawings for multi-function components (e.g. microcontrollers)
Connection points for symbol pins must be placed outside the symbol body and must not require a connecting wire to cross the symbol.
Example of incorrect symbol:
Example of correct symbols:
Pin name position offset must not exceed 50mil
(1.27mm
)
Pin name position offset should not be set less than 20mil
(0.508mm
)
Preferred value is 20mil
Larger offset allowed to accomodate particular symbol geometry
Examples:
For IC components with exposed pads, the number of the exposed pad should start one greater than the pin-count of the footprint.
For a SOIC-8 package with a single exposed pad, the exposed pad will be assigned the number 9
Using a 100mil
(2.54mm
) grid, pin origin must lie on grid node (IEC-60617)
Pins should have a length of at least 100mil
(2.54mm
)
Shorter pins may be allowed to accommodate simple symbols for discrete devices such as resistors, capacitors, etc.
Pin length must not exceed 300mil
(7.62mm
)
Pin length can be incremented in steps of 50mil
(1.27mm
) as required, whilst meeting the absolute length limits as specified above
Pin numbers must be unique (no two pins may have the same number)
Where possible, pins should be grouped by similar function, rather than by their physical location on the associated footprint. This provides cleaner schematic routing and symbols are easier to understand in the schematic.
Pins with similar functions should be grouped together:
SPI_MISO
, SPI_MOSI
, SPI_CS
, SPI_CLK
UART_TX
, UART_RX
Ports should be ordered from top to bottom
Positive power pins should be placed at the top of a symbol
Vcc
, Vdd
, Vin
, V+
, etc.
Negative power and ground pins should be placed at the bottom of a symbol
GND
, Vss
, V-
, etc.
Input/Control/Logic pins should be placed on the left of a symbol
UART Tx/Rx
Output/Controlled/Driver pins should be placed on the right of a symbol
RS232 Tx/Rx
Many symbols have corresponding footprints where multiple physical pins are connected to a single logical net. It is desirable that in such cases the user only has to connect a single pin in the schematic, and it will automatically route to all the physical pins on the PCB.
KiCad currently has no native method for designating that a particular symbol pin maps to multiple footprint pins. The following guide serves as a workaround for designing such symbols.
In the schematic view, pins that share the same position are considered to be connected by the KiCad routing algorithm. Thus, pins can only be placed in the same location under a very specific set of circumstances:
Pins must not be of type No Connect
(these pins should never be connected together)
Pins are logically connected in the symbol
Pins must have the same name
Pins must have the same electrical type
One pin in the stack must be visible (all other pins set to invisible)
Special Case: Pins of electrical type [Output
, Power Output
, Power Input
] are special cases. Connecting these pins together causes ERC (electrical rule check) errors and must be avoided.
For pin stacks using these pin types:
Visible pin must be set to correct electrical type
All invisible pins must have electrical type set to Passive
Pin Electrical type
should be set to match the appropriate pin function
Power and ground pins should be set to either Power Input
or Power Output
Logic pins should be set according to datasheet requirements
Pins with programmable functionality (e.g. MCU I/O ports) should be set to Bidirectional
Pins must not be 'double inverted' by assigning the inverting graphical symbol and also having a bar above the name of the pin
Often a component has pins that are not physically connected, and in such cases, unconnected pins may be omitted from the schematic symbol.
Pins may only be omitted if they are never to be connected under any circumstances
If pins are designated NC
but the datasheet specifies that these must be pulled to ground or otherwise connected to a specific net, then these must be shown on the schematic symbol
If the pin-count in the schematic does not match the pad-count on the footprint, the footprint filter must include the pad-count of the footprint (see also requirements for footprint filters)
SOT?23?5
SOIC?8
Hidden connection pins are generally not allowed for schematic symbols. Any connection point must be visible, otherwise unexpected net connections can occur.
Hidden power pins are also not allowed.
Exceptions
Unused NC pins can be set to invisible. In this case the electrical type must be Not Connected
. The end of the pin should lie on the symbols outline box to prevent unwanted connections to the invisible pin (see screenshot below).
Invisible pins may be used in a pin stack to allow one-to-many connections. Refer to the requirements for pin stacking
Rather than selecting the active low graphical pin style, active low pins should be designated using a bar above the pin name.
This provides a cleaner look for the schematic.
To place a line above the pin text, prefix the name with the tilde (~
) character.
For atomic symbols (those with an associated default footprint), the Footprint field must be filled with a valid entry of the format <footprint_library>:<footprint_name>
.
For generic symbols (those which map to multiple possible footprints), the Footprint field must be left blank
Footprint filters are used to help match appropriate footprints to a given symbol. This is important even for atomic symbols (symbols with only one matching footprint), as there still may be multiple compatible footprints with different variants or options (e.g. _HandSoldering
, _Heatsink
, _ThermalVias
).
Footprint filters use wildcard pattern matching, and allow the following wildcards:
*
- Match zero or many characters
?
- Match zero or one characters
:
- Include the library name in the search (can only be used once)
Filter conventions:
Filters should end with a *
wildcard to allow matching of modified footprint suffixes
Filters should match the dimensional information (where required) to be as specific as necessary:
DIP*W7.62mm*
to match DIP-22_W7.62mm
but not DIP-22_W9.3mm
Filters should not contain the pin count if the pin-count in the symbol matches the pin count in the footprint. In those cases the footprint is matched by KiCad’s pin count filter. If not all pins are present in the symbol (e.g. NC-pins) the pin-count has to be part of the footprint filter (see requirements for NC pins). Then e.g. SOT?23?5
might be used instead of simply SOT?23*
to match SOT-23-5
.
By default, the footprint search does not include the name of the footprint library. To force the library name to be included, add the :
(colon) character to the filter. Text appearing before the :
will match the library name. Text appearing after the :
will match the footprint name.
Conn*:*Pitch?1.25mm*
will match any footprint with '1.25mm' pitch, only in libraries that begin with the text 'Conn'
Footprint filters can be set in the Footprint Filter tab in the Symbol Properties window.
The symbol Reference Designator must be filled out appropriately for the particular type of symbol.
The table below provides a list of appropriate RefDes values. If you do not find an appropriate component entry, consult with the KiCad library team.
Designator | Component Type |
---|---|
A | Sub-assembly or plug-in module |
BT | Battery |
C | Capacitor |
D | Diode |
DS | Display |
F | Fuse |
FB | Ferrite bead |
FD | Fiducial |
FL | Filter |
H | Hardware (mounting screws, etc) |
J | Jack, fixed part of a connector pair |
JP | Jumper / link |
K | Relay |
L | Inductor, coil, ferrite bead |
LS | Loudspeaker or buzzer |
M | Motor |
MK | Microphone |
P | Plug, movable part of a connector pair |
Q | Transistor |
R | Resistor |
RN | Resistor network |
RT | Thermistor |
RV | Varistor |
SW | Switch |
T | Transformer |
TC | Thermocouple |
TP | Test point |
U | Integrated circuit (IC) |
Y | Crystal / oscillator |
Z | Zener diode |
Reference field is selected appropriately for the symbol and is visible
Value field contains the name of the symbol and is visible
Footprint field contains footprint link for atomic parts, and is empty for generic parts. It must be invisible
Datasheet field is left empty, and is invisible
The symbol contains no other custom fields
Component metadata is contained in the <libname>.dcm
file, and must be filled in for each unique symbol (and each alias for the symbol).
Description field contains comma-separated device information
For symbols with a default footprint, the simplified footprint name should be appended to the description e.g. SOIC-8
Part name should not be duplicated in the description field
Keywords field contains space-separated keyword values. These values are used to assist in part searching and should not include filler words
Documentation File Name field contains URL to part documentation if applicable, or is otherwise left blank
Power flag symbols are special symbols in KiCad, used to designate global nets. These symbols use a special RefDes value to indicate that they must be considered as global power flags
Reference Designator must be set to #PWR
Power flag symbols must contain exactly one pin, which is set to invisible
Electrical pin type must be set to Power Input
Pin name must match the symbol name
The example image below demonstrates the requirements as listed above:
Graphical symbols are used only to annotate schematics and do not correspond to a footprint on the PCB.
Reference Designator must be set to #SYM
and must be invisible
Symbol name must be set to invisible
Graphical symbols must not contain any pins
No pins or footprint association
No footprint filters
Example:
The following guidelines apply to PCB footprints and footprint libraries.
Footprints are grouped into libraries (directories with .pretty
extension) based on their primary function. As an extension of this, footprint libraries should be named based on this same functionality.
Library names must be defined based on the priority list below, with each element separated by the underscore (_
) character:
Function (e.g. Conn
, Capacitor
)
Sub-function (e.g. HDMI
, USB
)
Tertiary qualifier (e.g. RightAngle
, SMD
)
Manufacturer name (e.g. Texas
, Microchip
)
Footprint series name (e.g. MicroFit
)
Extra library descriptors as required
Note: Some of the elements listed above may be omitted if not required.
Example footprint library names:
Conn_USB_SMD
- Surface mount USB connectors
Conn_Molex_MicroFit
- Molex MicroFit series rectangular connectors
Capacitor_Tantalum_SMD
- Surface mount Tantalum capacitors
Categorizing connectors by function can prove difficult as many connectors can be used in a wide variety of applications.
Therefore, categorization of connector footprints is given special consideration as detailed below:
Connectors are grouped firstly by their primary function (where such a function exists). Examples of primary function include:
Conn_USB
Conn_HDMI
Conn_Ethernet
When primary function libraries become too large, they can be split by sub-function or by manufacturer
Conn_USB_Molex
Conn_DSUB_HighDensity
For connectors without a specific function, then connectors are grouped by their mechanical type:
Conn_Barrel
Conn_DIN
Conn_DSUB
Conn_PinHeader
Conn_PinSocket
Conn_Rectangular
Connector libraries can be further split by another qualifier:
Conn_PinHeader_2.54mm
Conn_PinHeader_1.27mm
Connector libraries can also be split by manufacturer and series, for multi-purpose connectors
TerminalBlock_Phoenix_MKDS
TerminalBlock_Phoenix_PT
TerminalBlock_Wago
Conn_JST
Conn_Hirose_DF13
Each footprint is a .kicad_mod
file (stored within a .pretty
directory). The naming convention for a given footprint depends largely on the type of footprint, however a general guide is presented below:
Specific package type is written first, e.g.
QFN
- Quad Flat No-Lead package
C
- Capacitor
Package name and number of pins are separated by a hyphen
TO-90
QFN-48
DIP-20
Unique fields (parameters) in the footprint name are separated by _
character.
Package dimensions are specified as length
x width
(and optionally height
)
3.5x3.5x0.2mm
1x1in
If necessary for clarity, footprint body dimensions may be prefixed with a leading B
Pin layout
1x10
2x15
Pitch is specified with a leading P
:
P1.27mm
- 1.27mm pitch
P5.0mm
- 5.0mm pitch
Modifiers to standard footprint values
Drill1.25mm
Pad2.4x5.2mm
Orientation e.g. Horizontal
, Vertical
Any modification to the original footprint, indicated by appending the reason
_HandSoldering
_ThermalVias
Not all of the fields defined above are strictly required for a particular footprint. Additional fields may also be added as needed.
A footprint name has to convey a lot of information to clearly specify the purpose and parameters of the footprint. Some fields in footprint names are common to many footprints and can be shortened using special abbreviations.
Not all footprints will require the use of these abbreviations - they are provided as a method of standardising the manner in which footprint parameters are called out when encountered.
In many cases, the major dimensions (x/y/z) of a footprint may be specified without a prefix, as the body dimensions are assumed to have the greatest priority in the footprint name. In cases where potential conflicts exist, the body dimensions must be explicitly named with the prefix B
.
e.g. SOIC-8_3.2x5.7mm_P1.27mm
Refer to the table below for accepted prefix abbreviations.
Prefix | Field Description | Notes |
---|---|---|
B | Body dimensions |
|
EP | Exposed pad |
|
D | Diameter |
|
H | Height |
|
L | Length |
|
P | Pad pitch |
|
W | Width |
|
T | Thickness | Component thickness, where appropriate |
Examples:
LQFP-32_4x4x1.1mm_P1.65mm
- LQFP package, 32 pins, 4x4mm body, 1.1mm height, 1.65mm pitch
CP_Radial_D4.5mm_P2.5mm_H10mm
- Radial capacitor, 4.5mm diameter, 2.5mm pitch, 10mm height
If the parameter is not found in the table above, the name of the parameter should be entered in full.
Following is a list of examples of (non-abbreviated) parameter names used in footprint naming
Prefix | Field Description |
---|---|
Ball | BGA Ball diameter |
Clearance | Clearance between pin rows |
Drill | Drill diameter |
Layout | Specific footprint layout e.g. Layout3x7 for a BGA with 21 balls arranged in 3 columns and 7 rows |
Lead | Lead dimensions |
Mask | Custom soldermask dimensions |
Pad | Custom pad dimensions |
Tab | Tab dimensions |
If a manufacturer footprint deviates from the "standard" footprints available, then this should be added to the library and designated as manufacturer-specific.
If a footprint is specific to a single manufacturer, this must be indicated by prepending the manufacturer name and MPN to the footprint name.
Texas_S-PVQFN-N48_
Sometimes the component datasheet will have specific requirements which do not conform to KLC requirements. A common example is specific requirements for the shape of stencil (solder paste layer).
In such cases, the KLC requirements can be superseded by the datasheet requirements, at the discretion of the KiCad library team.
Generally, a footprint should include a field of the format <pkg>-<pincount>
, e.g.
SOIC-8
QFN-24
In the majority of cases, the pin quantity is self explanatory and is sufficient to describe the number of pins on the symbol.
However there may be cases where this numbering is insufficient. Where the number of footprint pins does not match the number of package pins, exceptions must be made.
Exception: Omitted pins, missing pin numbers are skipped
Example: LTC3638
The LTC3638 comes in an MSOP-16
package which has four missing pins, for increased voltage isolation.
In this case, the numbers for the missing pins are skipped and the normal pin numbers are assigned to the remaining pins.
To indicate this, the footprint should be named as follows:
PKG-<xx>-<yy>
where:
xx
= number of remaining pins
yy
= number of remaining pins + number of removed pins
In the LTC3638 example above, this would result in:
MSOP-12-16
The footprint pads should be numbered like so:
Footprint naming is sufficiently complex that a general rule is not enough to fully define a naming scheme that fits the wide range of footprints.
The following footprint naming conventions should be used as examples for naming SMD chip package footprints.
If you do not find an appropriate convention that matches a particular footprint type, either contact the KiCad library team or try to match a convention set by existing library components.
In the entries below, variable fields are denoted as follows:
- Fixed fields
- Mandatory fields
- Optional fields
Example:
Notes:
The prefix is determined by the default reference designator of the device, e.g.
Capacitor = C
Capacitor (polarised) = CP
Resistor = R
Diode = D
Case size codes:
Imperial Code | Metric Code | Size Imperial | Size Metric |
---|---|---|---|
01005 |
0402 |
0.0157 in × 0.0079 in |
0.4 mm × 0.2 mm |
0201 |
0603 |
0.024 in × 0.012 in |
0.6 mm × 0.3 mm |
0402 |
1005 |
0.039 in × 0.020 in |
1.0 mm × 0.5 mm |
0603 |
1608 |
0.063 in × 0.031 in |
1.6 mm × 0.8 mm |
0805 |
2012 |
0.079 in × 0.049 in |
2.0 mm × 1.25 mm |
1008 |
2520 |
0.098 in × 0.079 in |
2.5 mm × 2.0 mm |
1206 |
3216 |
0.126 in × 0.063 in |
3.2 mm × 1.6 mm |
1210 |
3225 |
0.126 in × 0.098 in |
3.2 mm × 2.5 mm |
1806 |
4516 |
0.177 in × 0.063 in |
4.5 mm × 1.6 mm |
1812 |
4532 |
0.18 in × 0.13 in |
4.5 mm × 3.2 mm |
1825 |
4564 |
0.18 in × 0.25 in |
4.5 mm × 6.4 mm |
2010 |
5025 |
0.197 in × 0.098 in |
5.0 mm × 2.5 mm |
2512 |
6332 |
0.25 in × 0.13 in |
6.3 mm × 3.2 mm |
2920 |
7451 |
0.29 in × 0.20 in |
7.4 mm × 5.1 mm |
The following footprint naming conventions should be used as examples for naming resistor footprints.
If you do not find an appropriate convention that matches a particular footprint type, either contact the KiCad library team or try to match a convention set by existing library components.
In the entries below, variable fields are denoted as follows:
- Fixed fields
- Mandatory fields
- Optional fields
Example:
The following footprint naming conventions should be used as examples for naming capacitor footprints.
If you do not find an appropriate convention that matches a particular footprint type, either contact the KiCad library team or try to match a convention set by existing library components.
In the entries below, variable fields are denoted as follows:
- Fixed fields
- Mandatory fields
- Optional fields
Example:
Notes:
At least one case size (either imperial or metric) must be specified
Metric case size must have the suffix Metric
Example:
EIA Metric size | Body size (XxYxZ) | Kemet Code | AVX Code |
---|---|---|---|
1608-08 |
1,6 x 0,8 x 0,8 mm |
— |
J |
1608-10 |
1,6 x 0,85 x 1,05 mm |
— |
L |
2012-12 |
2,05 x 1,35 x 1,2 mm |
R |
R |
2012-15 |
2,05 x 1,35 x 1,5 mm |
— |
P |
3216-10 |
3,2 x 1,6 x 1,0 mm |
I |
K |
3216-12 |
3,2 x 1,6 x 1,2 mm |
S |
S |
3216-18 |
3,2 x 1,6 x 1,8 mm |
A |
A |
3528-12 |
3,5 x 2,8 x 1,2 mm |
T |
T |
3528-15 |
3,5 x 2,8 x 1,5 mm |
— |
H |
3528-21 |
3,5 x 2,8 x 2,1 mm |
B |
B |
6032-15 |
6,0 x 3,2 x 1,5 mm |
U |
W |
6032-20 |
6,0 x 3,2 x 2,0 mm |
— |
F |
6032-28 |
6,0 x 3,2 x 2,8 mm |
C |
C |
7343-15 |
7,3 x 4,3 x 1,5 mm |
W |
X |
7343-20 |
7,3 x 4,3 x 2,0 mm |
V |
Y |
7343-30 |
7,3 x 4,3 x 3,0 mm |
— |
N |
7343-31 |
7,3 x 4,3 x 3,1 mm |
D |
D |
7343-40 |
7,3 x 4,3 x 4,0 mm |
Y |
— |
7343-43 |
7,3 x 4,3 x 4,3 mm |
X |
E |
7360-38 |
7,3 x 6,0 x 3,8 mm |
E |
— |
7361-38 |
7,3 x 6,1 x 3,8 mm |
— |
V |
7361-438 |
7,3 x 6,1 x 4,3 mm |
— |
U |
Example:
Example:
Notes:
There are different capacitor styles available:
Axial: Cylindrical body with axial lead attachment.
Radial: Cylindrical body, both leads enter at same end.
Disc: Disc shaped body (sometimes enclosed), leads enter tangent to the inner disc
Rect: Box shaped body (Bottom face in contact with the board)
Body size:
For Axial body styles: L[length]_D[diameter]
For Radial body style: D[diameter]{_H[height]}
For Disc body style: D[diameter]_W[width]{_H[overall height]}
For box shaped body styles: [X]x[Y]{x[Z]}
The following footprint naming conventions should be used as examples for naming SMD IC package footprints.
If you do not find an appropriate convention that matches a particular footprint type, either contact the KiCad library team or try to match a convention set by existing library components.
In the entries below, variable fields are denoted as follows:
- Fixed fields
- Mandatory fields
- Optional fields
The format below provides a guide for naming Gullwing IC packages.
Examples:
SOIC
SOP
QFP
J-Lead
Example:
Notes:
[PKG
] - refers to the name most commonly used in the industry. Generally this implies JEDEC naming but some other standard may be used as required.
[Pin count
] - the number of uniquely numbered pads (excluding any exposed pads under the device)
[Modifiers
] - may vary for individual IC footprint types. Includes:
Clearance
Lead size
Pad size
Exposed pad size
Soldermask expansion
Examples:
DFN
QFN
LCC
Example:
Notes:
The lead length is the nominal lead length for which the footprint is designed
Optionally the nominal lead width can also be provided
Example:
Notes:
For BGA simply providing the pin count is not sufficient. It is also necessary to provide the number of [Columns
] (x direction) and [Rows
] (y direction).
Some BGA packages have different pitch in x and y directions. If this is the case then both [Pitch
] dimensions need to be provided
The [Ball
] diameter for which the footprint is designed needs to be provided
[NSMD/SMD
]
NSMD means the footprint is designed for non solder mask defined
(mask cutout is larger than copper pad)
SMD means the footprint is designed for solder mask defined
(mask cutout is smaller than copper pad)
The following footprint naming conventions should be used as examples for naming THT IC package footprints.
If you do not find an appropriate convention that matches a particular footprint type, either contact the KiCad library team or try to match a convention set by existing library components.
In the entries below, variable fields are denoted as follows:
- Fixed fields
- Mandatory fields
- Optional fields
Example:
Notes:
Drill size (if specified) must be given in mm
Example:
Notes:
Drill size (if specified) must be given in mm
Orientation
can be chosen from:
Vertical
TabDown
TabUp
Stagger
can be chosen from:
StaggerOdd (odd pins are further from component body)
StaggerEven (even pins are further from component body)
Size Parameter:
Orientation:
The following footprint naming conventions should be used as examples for naming connector footprints.
If you do not find an appropriate convention that matches a particular footprint type, either contact the KiCad library team or try to match a convention set by existing library components.
In the entries below, variable fields are denoted as follows:
- Fixed fields
- Mandatory fields
- Optional fields
Connector footprints are extremely diverse and the naming conventions for connectors can be complicated. This section details some examples of naming schemes for various connector types. While there are variations between connectors, the general format for naming connectors is as follows:
Notes:
[Series
] - a versatile field which could contain:
Functional description (e.g. USB
)
Connector type (e.g. PinHeader
or TerminalBlock
)
Industry standard (e.g. DSUB-15
)
Manufacturer specific series (e.g. Hirose_DF13
)
[MPN
] (manufacturer part number) - uniquely identifies a connector according to that manufacturer’s internal naming conventions
[Pin layout
] - dependent on the connector type
Single row connectors: 1x[number of pins
]
Multi row connectors with equal number of pins in each row: [number of rows
]x[number of pins per row]
Other connectors: [number of rows
]Rows_[number of pins
]
Connectors for standardized interfaces do not need to include the pin configuration information (e.g. USB)
Number format:
[number of rows
] number of rows no leading zero.
[number of pins per row
] and [number of pins
] two digit number with leading zero. (can have more digits for connectors with > 99 pins)
[Pitch
] - if the connector standard does not imply the pin pitch, then this field is required
[Modifiers
] - multiple fields may be added here, detailing modifications or devations from the standard footprint design. Examples include:
Pad size variation
Drill size variation
[Orientation
] - The orientation of the connector with reference to the board plane
[Options
] - Extra footprint options
In addition to these conventions, additional schemes are employed for specific connector types - these are detailed below.
Many connectors are designed for specific functions (e.g. USB, HDMI, SD-Card, etc). In these cases, specific naming conventions should be followed:
Example:
Notes:
Some examples of functional connector naming are provided below:
USB_Micro-B_Wuerth_614105150721_Vertical_CircularHoles
HDMI_Micro-D_Molex_46765-2x0x
MicroSD_Wuerth_WR-CRD_693072010801
In most cases, pin layout does not need to be explicitly specified
Many connectors are provided by multiple manufacturers in an industry standard package or physical layout. These connectors should use the accepted industry naming at the beginning of the footprint name:
Example:
Notes:
The generic connector type [Standard
] defines the shape of the connector
e.g. DSUB
Tab
Circular
Examples of generic arrayed connectors:
PinHeader
PinSocket
TerminalBlock
Example:
Manufacturer series connectors are those which are particular to a particular manufacturer standard.
Example:
Notes:
If the footprint is located in a library dedicated to a single manufacturer, then the MAN
prefix is not required
The following footprint naming conventions should be used as examples for naming fuse and fuse holder footprints.
If you do not find an appropriate convention that matches a particular footprint type, either contact the KiCad library team or try to match a convention set by existing library components.
In the entries below, variable fields are denoted as follows:
- Fixed fields
- Mandatory fields
- Optional fields
Example:
Examples of Fuse Type
field:
Automotive fuses:
Automotive-Micro2
Automotive-Micro3
Automotive-LowProfile
Automotive-Mini
Automotive-ATO
Automotive-Maxi
Automotive-Bosch
Automotive-SFE-[SizeCode]
Industrial fuses
Cylinder-[diameter]x[length]mm
Example:
Example:
Where conflict exists between datasheet recommendations and KLC requirements, then (in the general case) the datasheet should take priority.
It is important when designing footprints that they adhere to requirements for soldering and assembly - often these requirements have very small tolerance for variation.
If the KLC is at odds with the datasheet, follow the datasheet, and note this difference to the KiCad library team when submitting your contribution.
Footprints should be oriented such that Pin 1 is located in the upper left corner (IPC-7351).
Exceptions
Where footprints cannot be oriented with pin 1 in the top-left quadrant, pin 1 should be aligned to the top
Two terminal footprints should be aligned with pin 1 on the left side
Footprints that contain multiple pads or conductive elements that are physically connected require special attention:
Multiple pads that are physically connected must share the same number
Thermal vias (if present) must share the same number as the thermal pad to which they are connected
Manufacturer datasheets may specify that thermal vias should be added to the thermal pad under a device package, to assist in moving heat away from the device.
In such cases the datasheet will usually specify the quantity, size and position of these vias.
In addition to manufacturer requirements, a number of extra conventions should be followed when creating thermal vias.
Thermal vias must share the same pad number as the pad on which they are placed
Where thermal vias are connected to a pad on the F.Cu
layer, a copper pad on the B.Cu
layer should be added, to provide thermal relief for the via. This pad must be large enough to fully surround the via(s) with a margin of >= 0.5mm
. Note: If the datasheet gives conflicting advice to the placement of this pad on the B.Cu
layer, then the datasheet instruction should be given preference.
Unless instructed by the datasheet, solder paste must not be placed over the thermal via(s). This can cause solder to wick into the via during reflow, and cause solder joint issues.
When submitting a footprint with thermal vias, the suffix _ThermalVias
should be added to the footprint name
If it does not already exist, a second version of the footprint without the thermal vias should be added. Note: This second version should not have the _ThermalVias
suffix in the footprint name.
KiCad does not yet have a method for drawing keepout areas inside footprint files. Until this feature is implemented, footprint keepout must should be indicated using the following procedure:
Keepout area shape should be drawn on the Dwgs.User
layer
Area should be hatched diagonally
Descriptive text may be included on the Cmts.User
layer. This text is used to provide further information about keepout requirements to the user.
Example:
Pad clearance values are determined using a priority system, which checks the following locations for clearance values, in descending order of priority. If a particular setting reads as zero (0
) then it is ignored, and the next location is checked.
Local pad settings - If an individual pad specifies clearance values, these are used
Footprint settings - If clearance values are specified in the Footprint Properties window, these are used
Global settings - If no values are specified as above, then the global values (as specified in PCB settings dialog) are used.
Unless there is a specific reason for setting explicit values for local clearance values for pads or pins, they should be left at zero (0
).
Exceptions:
If the component datasheet calls for specific clearance values for a particular pad (or the entire footprint) then these values should be used as appropriate.
The silkscreen is printed to the external surface of a PCB to aid in component identification and orientation. Typically this layer contains the component RefDes to locate components on the board after assembly.
KiCad refers to the silkscreen layers as:
F.SilkS
- Front silkscreen layer
B.SilkS
- Back silkscreen layer
The following elements must be provided on the silkscreen.
Reference Designator must be drawn on F.SilkS
layer
Text size = 1.00mm
Text thickness = 0.15mm
Silkscreen must not be placed over pads or areas of exposed copper
Clearance between silkscreen and exposed copper elements must be at least 0.2mm
or more than the pad mask expansion (whichever is greater).
For SMD footprints, silkscreen must be fully visible after boards assembly (no silkscreen allowed under component)
For THT components, silkscreen may be placed under component to aid in assembly process
Silkscreen line width is between {0.10mm
and 0.15mm
} as per IPC-7351C:
Silkscreen line width should nominally be 0.12mm
0.1mm
is allowed for high density designs
0.15mm
is allowed for low density designs
Pin-1 designator is provided on the F.SilkS
layer
Pin-1 designator must be visible after board assembly
The fabrication layers are used to display the simplified mechanical outline of components on the PCB.
KiCad refers to the fabrication layers as:
F.Fab
- Front fabrication layer
B.Fab
- Back fabrication layer
The following elements must be provided on the fabrication layer(s)
Simplified component outline must be provided on F.Fab
layer
Outline uses line width between {0.10mm
and 0.15mm
} (recommended 0.10mm
)
Outline should be simplified and not display complex features
Footprint polarisation / location of pin-1 is drawn
For IC packages, bevel is drawn at corner next to pin-1
Bevel should be 1mm
or 25% of package size
(whichever is smaller)
For connectors, a small arrow indicator drawn next to pin-1 should be used
Component value (footprint name) must be displayed on the F.Fab
layer
Recommended text size = 1.0mm
Allowable text size = {0.1mm
to 2.0mm
}
Allowable text thickness = {0.01mm
to 0.20mm
} (should be approximately 15%
of text size, with allowances for variation for aesthetic reasons)
If there is enough space, it should be placed inside footprint boundaries
A second copy of the reference designator (RefDes) must be provided on the F.Fab
layer. To add a second RefDes item, add a text object with the value %R
RefDes must be centered on component body (inside component outline)
Orientation of RefDes should match major component axis
Size of text should be scaled to match component size
Recommended text size = 1.00mm
Allowable text size = {0.1mm
to 2.0mm
}
Allowable text thickness = {0.01mm
to 0.20mm
} (should be approximately 15%
of text size, with allowances for variation for aesthetic reasons)
The component courtyard is defined as the smallest rectangular area that provides a minimum electrical and mechanical clearance around the combined component body and land pattern boundaries. It is allowed to create a contoured courtyard area using a polygon instead of a simple rectangle. (IPC-7351C)
The courtyard should include any extra required clearance for mating connectors (for example).
KiCad refers to the courtyard layers as:
F.CrtYd
- Front courtyard layer
B.CrtYd
- Back courtyard layer
A fully enclosed Component courtyard must be drawn on the F.CrtYd
layer, with the following parameters:
Courtyard uses 0.05mm
line width
All courtyard line elements are placed on a 0.01mm
grid
If the component requires a courtyard on the back of the PCB, a corresponding courtyard must be provided on the B.CrtYd
layer.
Courtyard clearance should adhere to the following requirements:
Unless otherwise specified, clearance is 0.25mm
Components smaller than 0603
should have a clearance of 0.15mm
Connectors should have a clearance of 0.5mm
, in addition to the clearance required for mating of connector
Canned capacitors should have a clearance of 0.5mm
Crystals should have a clearance of 0.5mm
BGA devices should have a clearance of 1.0mm
Example for courtyard clearance when applied to the contoured courtyard outline of a QFP-64 package. (Shown are courtyard, fab-outline and copper pads.)
The Footprint placement type must be set to Surface mount
for SMD footprints. This is to ensure that these footprints are included in the Footprint position (.pos) file output.
To set the footprint placement type, open the Footprint properties window and select Surface Mount as indicated.
In KiCad 4.x, Placement type is called Attributes and Surface mount is called Normal+Insert.
The footprint anchor (also called component origin) is used by automated Pick and Place (PNP) machines for locating and placing SMD components on a PCB.
For most standard components, the anchor should generally be located on the centroid of the component body.
In the KiCad footprint editor, the footprint anchor is always located at the origin (0, 0). To move the footprint relative to the anchor (origin), press the Place footprint reference anchor button (refer to image below).
Exceptions:
Some footprints (especially those which are non-symmetrical) require special consideration and the anchor may not necessarily be placed on the component centroid.
Generally speaking, the correct location of the footprint anchor can be found in the component datasheet. The image below shows an example for a Molex Pico-Lock connector.
Surface mount pads have specific requirements for PCB design.
By default, pads for SMD footprints should use only the following layers
F.Cu
- Front copper
F.Mask
- Front soldermask
F.Paste
- Front solderpaste (stencil openings)
If SMD pads are placed on the back of the PCB, then the following layers should be used:
B.Cu
- Back copper
B.Mask
- Back soldermask
B.Paste
- Back solderpaste (stencil openings)
Pads with specific stencil aperture design requirements require special attention (see details below)
Many components (IC packages in particular) have specific design requirements for solderpaste (stencil) design. These requirements are often found in the footprint datasheet or an associated technical document.
Most often, custom stencil openings are required for the exposed pads on large IC packages to reduce the amount of solderpaste that is applied during stencil application.
The image below shows an example stencil design found in a footprint datasheet. The superimposed blue square represents the shape of the exposed copper pad. The green squares are the required openings in the stencil.
Custom stencil openings are accommodated as follows:
Construct copper shape with pad(s) with only copper layers (F.Cu
and/or B.Cu
) as appropriate. These copper pads should not have the F.Paste
or B.Paste
layers checked.
Add stencil opening(s) with pad(s) which only use solderpaste layers (F.Paste
and/or B.Paste
) as required. These pads do not have a pad number.
The solderpaste should cover between 50% and 80% of the soldermask free pad area.
Result: (note: this footprint does not correspond to the example shown above)
The footprint placement type must be set to Through Hole
for THT footprints. This ensures that these footprints are not included in the Pick and Place (PNP) location files.
This can be selected in the Footprint Properties window
In KiCad 4.x, Placement type is called Attributes and Through hole is called Normal.
Through hole components should set the shape of Pin 1 to Rectangular
, and all other pads to either Circular
or Oval
. This aids in orienting the component during placement and also for locating Pin 1 for circuit troubleshooting.
Pad shape can be adjusted in the Pad Properties dialog:
Exception:
Non polarized parts (such as THT resistors) should not set the shape of Pin 1 to Rectangular. For these (non polarized) footprints, all pad shapes should be consistent.
Through hole pads must have soldermask pulled back to allow soldering. However they must not have solderpaste openings as they do not receive solder paste during stencil screening.
Pads for THT footprints must have the following layers set:
All copper layers
F.Mask
(front mask)
B.Mask
(back mask)
Pads must not have the silkscreen layers active
For drilled through-holes, the minimum annular ring width must be at least 0.15mm
(IPC-2221).
The annular ring is the copper pad which remains after the hole has been drilled.
Virtual components are those which have a footprint on the PCB (and may additionally have a schematic symbol) but do not have an associated physical component which needs to be loaded onto the board during assembly.
Examples of virtual components include:
Mounting holes
Solder bridges
Net ties
Test points
Fiducial markings
Virtual components must be indicated by setting the Placement type to Virtual
in the Footprint Properties dialog.
Documentation field contains comma-separated device information. Where appropriate, a URL to the footprint datasheet should be included.
Keywords field contains space-separated keyword values
Ref field must be set to REF**
Value field must match footprint filename (ignoring the .kicad_mod
extension)
Footprint properties should be left as default, unless there is a reason to do so as specified by the footprint datasheet (for example).
Move and Place must be set to Free
Auto Place should be set to 0
, 0
Local Clearance Values should all be set to 0
Exceptions:
The Local Clearance Values parameters are generally set to 0
, indicating that the global clearance values will be used to determine pad clearances.
If all the pads on the particular footprint require a specific clearance value (for e.g. as described by the datasheet) then these values can be used here to override pad-specific settings for the entire footprint.
3D model files must be placed in a library (directory) which has the same name as the footprint library, with the extension .3dshapes
Capacitor_SMD.pretty
→ Capacitor_SMD.3dshapes
Connector_USB.pretty
→ Connector_USB.3dshapes
3D model files should be named the same as the footprint (ignoring file extension)
SOIC-8.kicad_mod
→ SOIC-8.wrl
R0805.kicad_mod
→ R0805.wrl
If a footprint is a simple variation that does not change the 3D representation, the common 3D model should be used (do not duplicate models unnecessarily)
R0805_HandSoldering.kicad_mod
→ R0805.wrl
QFN-48_ThermalVias.kicad_mod
→ QFN-48.wrl
Model scaling must be 1:1:1 (model file should not require any scaling to correctly fit the footprint)
Path to 3D model should have ${KISYS3DMOD}/
prefix
Filetype must be .wrl
If the 3D model is missing (does not yet exist), the 3D model reference should still be added. This means that the footprint does not have to be edited again once the 3D model is added.
The following guidelines apply to contribution of 3D model data.
Users should only submit models they have created themselves, either manually designed or via parametric scripting tools.
Contributing model data designed by a third party complicates licensing issues and should be avoided.
If a manufacturer provides 3D model data for download from its website, these models should not be duplicated in the KiCad library.
A link to the manufacturer model files may be added to the README.md
file within the 3D model directory.
Exception:
If 3D model data provided by a manufacturer is of low quality or not available for public download, then these data may be added if the following criteria are met:
The contributor is the creator of the model data
The contributed files provide some advantage over the data supplied by the manufacturer
The KiCad library maintains a repository for 3D source files at https://github.com/kicad/kicad-packages3d-source.
The source files used to generate 3D model data should be submitted to this repository when a user contributes 3D model data.
Source files include file generator scripts, or native model files from source software (e.g. FreeCAD).
The source repository directory structure mirrors that of the kicad-packages-3d repository.
The KiCad 3D model library supports two file formats:
WRL
WRL files contain material properties and are used for realistic rendering. However they cannot be exported to MCAD packages.
KiCad v4.x and lower can only render WRL files
STEP
STEP files are used for integration with MCAD software packages. These files do not contain material properties and cannot be used for realistic rendering.
KiCad v5.x and above can render STEP files directly in the 3D viewer
Only models provided in these file formats will be accepted.
It is suggested that a .WRL and .STEP version of the model are provided simultaneously. This provides options for both high quality rendering and MCAD integration.
The 3D models must be aligned and scaled appropriately to match the associated footprint.
Alignment
The 3D model must be aligned such that it does not require an additional alignment offset in the footprint options. When associating a 3D model with a footprint, the offset
parameter must read (0
, 0
, 0
)
Scaling
STEP files include absolute dimensional information, and should never have a secondary scaling factor applied. The model scaling
parameter in KiCad must read (1
, 1
, 1
)
WRL files do not specify absolute dimensions. KiCad normalizes model parameters to units of inches and the internal units (dimensionless) of the WRL model must be scaled accordingly.
Rotation
The model should be rotated such that no additional rotation is required within KiCad to align the 3D model with the footprint.
The KiCad library team have developed a set of Python scripts which can be used to help test if library components conform to the KLC requirements.
When a pull request is made to the libraries, the contributed files are automatically checked using these scripts. It can be helpful to run these scripts on your local machine before submitting a PR, as it will help speed up the process of merging your contribution(s) into the library.
Note: While many of the KLC guidelines are checked by these scripts, there are some which are not covered. Additionally, any PR requires manual checking by a member of the library team.
Revision information for the KLC can be found here.